In the manufacturing process for primed circuit boards, a layer of conductive material is applied by various methods onto each printed circuit board substrate and then the conductors on the printed circuit board are imaged and etched. The conductors are used to interconnect components which will be later connected to the printed circuit board. During the manufacturing and or etching process, defects in the conductors and plated through holes (PTH) sometimes occur. Since correcting printed circuit boards at the site of the consumer is expensive, manufacturers attempt to identify and if possible correct the defective conductors before the printed circuit boards are sent out.
The manner in which defects in conductors can occur include, over etching, thin plating, handling scratches, "mouse bites," and voids or defective interconnects in PTHs. The types of defects which can occur include open circuits in the conductor or PTH, areas of reduced cross-sectional area, known as "necked-down" regions, in the conductor, and areas of reduced cross-sectional area along the entire length of the conductor. Other detectable defects include partial voiding in PTH and defective inner layer interconnects on multilayer PCBs.
One example of a conductor C1 with a necked down region NDR1 on a printed circuit board PCB1 is illustrated in top and side views, shown in FIGS. 1(a-b). At the necked down region NDR1, the thickness of conductor C1 is substantially reduced. Since the current carrying capacity a conductor is dependent on the cross-sectional area of the conductor, a reduced cross-sectional area along a portion or the entire length of the conductor will effect the conductor's capacity to carry current. As a given current flows through a conductor with a reduced cross sectional area over part or all of its length, the higher current density in the section of reduced area will result in greater power dissipation in that area and a corresponding larger temperature rise in that area. Eventually, the conductor with a necked down region or a reduced cross-sectional area along its entire length may burn out from the thermal stress. Defect areas in conductors where there is an open circuit are easy to detect, but defects in conductors where the region is necked down as shown in FIGS. 1(a-b) or where the entire length is reduced are difficult to detect. Standard methods for electrical testing of PCBs only reveal complete open or short circuits.
Existing techniques for detecting partially defective conductors are imprecise and often fail to identify partially defective conductors. For example, one prior technique identifies defective conductors by applying a high current pulse to each conductor on the printed circuit board to burn open any defective conductors. However, this technique is imprecise because some conductors which are defective will not be identified because the high current pulse is insufficient to burn open the defective conductor. Another technique applies a continually increasing current signal to each conductor on the printed circuit board, measures the voltage drop across each conductor, and monitors the voltage and current waiting for the voltage to start varying nonlinearly with the current signal. Again this technique is imprecise because some conductors which are defective will not be identified because the nonlinear fluctuation of the voltage with respect to the current may not be sufficient to identify a defective conductor. Additionally, prior techniques often are unable to accurately control the amplitude or magnitude and duration of the current pulses used to test conductors and as a result conductors and printed circuit boards which are acceptable are damaged.